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Design For Test (DFT) – Part Time

Trainer
Mr.Siva
Category:
For Working Professionals/
₹95,000.00
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Register Now
20 Students
Duration: 20 Weeks
Takshila VLSI Certificate

Weekend DFT Training / Part Time DFT Training Institute in Bangalore

COURSE DESCRIPTION

Design For Testability (DFT) is a specialization in the SOC design cycle, to detect the manufacturing defects in a design. With the increase in size & complexity of chips, facilitated by the advancement of manufacturing technologies, DFT has evolved as a specialization in itself over a period of time. DFT Engineers works on introducing various test structures as part of the design flow, on increasing the testability of logic, memories and interconnects.

DFT training course is designed as per the current industry requirements with multiple hands on projects based on SCAN, ATPG, JTAG and MBIST.

DFT Training Part Time / Weekend DFT Training

Eligibility

  • B.E/B.Tech in ECE/EEE.
  • M.E/M.Tech/M.S in VLSI/Embedded Systems/Digital Electronics.

Course Highlights:

By end of this course, the candidate will be able to:

  • Review, analyse and propose changes to improve testability and implement them by doing Scan,ATPG and Simulations.
  • Analyse the DRC issues and can be able to find the solution during scan and ATPG.
  • Analyse test coverage, propose changes to improve test coverage to achieve the goal with optimal patterns
  • Generate the patterns for both stuck-at and at speed testing of the design for optimal test cost.
  • Understanding and applying debugging techniques used in debugging test on silicon in simulation environment
  • 24×7 Lab Support with Lab practice handouts and course material delivery.
  • Industry standard project execution with Lab practice and theory sessions under the guidance of industry expert with 12+ years of experience.
  • Soft skills development, complete suite of job oriented physical design training with 100% placement assistance

Best DFT training institute with placement

COURSE CURRICULUM

Module 1: Basics of Unix/Linux

Introduction and Working knowledge of UNIX/LINUX commands  
File handling skills in UNIX/LINUX  
Introduction to TCL commands  

Module 2: Digital Electronics

Binary system and Boolean algebra  
Combinational Circuits  
Sequential circuits - Counters, state machines, shift registers  

Module 3: Introduction to ASIC Design

ASIC Flow  
All Stages Discussion  

Module 4: Introduction to Verilog

Basic Concepts  
Gate - Level Modeling, Dataflow Modeling, Behavioural Modeling  
Tasks and Functions  

Module 5: Design For Test

Need for Testing  
Design for Test  
DFT-Digital Design  
ATPG-Common Terminology, ATPG  
Scan ATPG & Fault Simulation  
Scan Design Rules  
Scan Test for Transition Delay  

Module 6: DFT- BIST

BIST  
MBIST, MBIST control modes  
LBIST  
Boundary Scan  

Module 7: DFT Compiler & Tetramax

Overview  
Flows Supported by DFT Compiler  
Scan Insertion Flow  
DFT Compiler Flow and supported Commands  
Tetramax Flow for ATPG  
Steps involved in ATPG mode  
ATPG models targeted by Tetramax  

Module 8: Industry standard Project Execution

Industry Standard Physical Design Live Project  

Module 9: Mock Interviews & Personality improvement

Frequently Asked Questions

1. What is the Design for Test part-time course all about?

The Design for Test part-time course helps build skills to understand the testing strategies that will help detect defects in chip designs. It is the best option for professionals and freshers who want to enhance their skills in VLSI Design for Test without making a full-time commitment.

2. Who should enroll in the VLSI Design for Test course?

This VLSI Design for Test course is for working professionals in the VLSI field who want to learn test strategies and improve their expertise in chip design testing while doing their current jobs.

3. How does the DFT training part-time format work?

Our DFT training part-time format best fits your schedule because we provide weekend and evening classes. This helps you balance your work commitments and is a flexible way to gain knowledge in test design.

4. What will I learn in the VLSI Design for Test classes?

Our course covers the following topics: scan, ATPG, JTAG, and MBIST. You will also work on real projects so that you will gain practical experience.

5. How can I apply for the DFT part-time education program?

You just visit our website, follow the instructions, fill out the application form, and contact us if you have any difficulties or want to know about the course details. We make the application process simple.

6. What kind of support will I receive during the VLSI test design part-time course?

We provide complete support to our students so that they can achieve their dream jobs. Hence, you can practice  24×7 in the lab and access study materials. With all this support, you can polish your skills and achieve your target.

7. Can I get help with job placement after completing the course?

Yes, our team provides full support to get placed in a dream company. We guide the placement round to every individual after completing the course. Our goal is to place you in a good company to start or boost your career growth.

About Instructors

Mr.Siva
Mr. Siva comes with 12+ years of experience VLSI Industry , with substantial experience in DFT and worked as a Lead Engineer in several product companies. He is passionate about teaching & sharing his knowledge and mentored entry/mid-level engineers throughout his career. We believe his solid knowledge on Digital and Physical Design implementation adopted by industry helps the students to shape themselves as good VLSI engineers.

Register Now
20 Students
Duration: 20 Weeks
Takshila VLSI Certificate

Course categories

  • For Freshers (7)
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Tuesday 9:30 am - 6.30 pm
Wednesday 9:30 am - 6.30 pm
Thursday 9:30 am - 6.30 pm
Friday 9:30 am - 6.30 pm
Saturday 8:00 am - 6.30 pm
Sunday 8:00 am - 6.30 pm

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Our courses are designed to offer students hands-on experience in industry trends.

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