Chip Designing in VLSI and Trends

Modern VLSI trends are gradually moving from large to smaller devices. In the past three years, we have seen an exponential increase in the productivity and performance of mobile processors. The IC industry has constantly continued to make devices geometry smaller.

According to Moore’s law, the number of transistors in a chip doubles every 18-24 months. This has continued to drive the scaling down of CMOS technology into Nano sizes. As the level of integration increases, so does the features and performance.

Over the period of 30 years, the semiconductor VLSI industry the industry has continued to change. There is a clear distinction between the companies of years and now. We have seen a lot of changes in the form of performance improvement and size.

The integration density of ICs and the speed have greatly upgraded. The use of one billion transistors ability of a single IC is now possible. However, this also requires a new system configuration and a substantial upgrade of design productivity. There are also major improvements in the area of structural complexities. This is achieved through inventing different design methods and investing more in design works.

According to IRTS, the number of transistors in a chip will continue to rise exponentially. The case is the same for the number of local clock frequencies required for high-performance. This rise is expected to take place over a period of 10 years.
According to IRTS, we should be expecting the following changes in general trends:

• Greater increase in the number of transistors for processors and DRAM memory features.
• The lime widths of IC’s will relatively be shrunk to smaller sizes.
• We will also see some growth in the chip die sizes.
• Semiconductor fabrication practice will also be met with increased complexity.

Conclusion

There are a lot of new opportunities in VLSI IC’s design today. As technology continues to scale the more the opportunities continue to grow for designers. A clear understanding of the trends gives a clearer roadmap for more efficient and effective chip designing. There are also quite a number of challenges facing the design of complex ICs as well.